1. Field of the Invention
The present invention relates to switched power supplies, and more specifically, to a forward converter that incorporates a switched shunt inductance coupled in parallel across the primary winding of the power transformer. The shunt inductance is used to produce a zero volt switching condition across the power switch of the power supply, permitting the power switch to be resonantly switched on with zero volts across it. In one embodiment, the converter circuit also includes an offset capacitor in series with the switched inductance, and a magnetic voltage averaging circuit. These components act to average the voltage across the primary power switch and control the magnetizing current in the power transformer. These features reduce the power losses associated with changing the state of the power switch compared to conventional zero volt switching forward converter circuits, and improve the overall efficiency of the converter by acting to reset the magnetic core of the power transformer.
2. Description of the Prior Art
Switching or "switch mode" power supplies use a semiconductor device as a power switch to control the application of a voltage to a load. A forward converter is used to provide a regulated output (or load) voltage which is lower than the input voltage (V.sub.IN) supplied by the input power supply. FIG. 1 is a schematic diagram showing a circuit for a conventional prior art forward converter 100. Applying a waveform to gate node 103 controls the operation of power switch Q1102 (which is shown as a MOSFET device but may be of other types). The waveform applied to gate node 103 is typically provided by a control circuit (not shown) which supplies a pulsed control signal using pulse width modulation (PWM), for example. When switch 102 is turned "on", i.e., conducting, the input voltage V.sub.IN is applied across the primary winding of power transformer 104. A secondary voltage, V.sub.S, is developed across the secondary winding of transformer 104 and applied across forward output rectifier D.sub.O1 106 (which then becomes forward biased). Current and power flows to output inductor L.sub.O 108 and output capacitor C.sub.O 110 (which form a LC filter), and load R.sub.L. Assuming a sufficiently large enough value for output capacitor C.sub.O 110, and neglecting diode drops and losses, the voltage across inductor 108 will be equal to V.sub.S minus the output voltage, V.sub.OUT. The current (i.sub.L) in inductor 108 will increase linearly with time and will be described by: EQU di.sub.L /dt=(V.sub.S -V.sub.OUT)L.sub.O.
Note that additional losses may be caused by an increase in the conduction losses in the primary circuit due to the higher RMS current necessary to sustain a resonance condition.
When power switch Q1 is turned off, i.e., non-conducting, the secondary voltage V.sub.S will reverse. However, the current in inductor 108 will continue to flow in the forward direction rendering "freewheeling" output diode D.sub.O2 112 conductive (forward biased). This permits the current to continue circulating in the circuit loop formed from diode 112, inductor 108, capacitor 110, and load R.sub.L (which is applied across the output terminals). The voltage across inductor 108 eventually reverses, having a value equal to the output voltage V.sub.OUT (again neglecting diode drops). The current in inductor 108 now decreases with time, and may be described by: EQU di.sub.L /dt=(-V.sub.OUT)/L.sub.O.
In a steady-state condition, the volt-seconds applied to inductor 108 are equal in the forward and reverse directions. Thus, when the "on" period for switch 102 (t.sub.on) during a cycle is equal to the "off" period (t.sub.off) during a cycle, the output voltage V.sub.OUT will be equal to one-half the value of the secondary side voltage V.sub.S. When the ratio of the power switch's "on" time to "off" time differs from a 50% duty factor (with the duty factor defined by t.sub.on (t.sub.on +t.sub.off)), the output voltage is given by: EQU V.sub.OUT =V.sub.S *t.sub.on /(t.sub.on +t.sub.off).
A drawback of switch mode power circuits as described above is that the switching devices in such circuits are subjected to high stresses and potentially high switching power losses as a result of the switch being changed from one state to another while having a significant voltage across it. These effects increase linearly with the switching frequency of the waveform used to control the power switch. Another drawback of switched power circuits is the electromagnetic interference arising from the large change in current (di/dt) and voltage (dV/dt) that occurs when the switch changes state.
The noted disadvantages of switch mode power converters can be reduced if each power switch in the circuit is caused to change its state (from "on" to "off" or vice versa) when the voltage and/or current through it is zero or at a minimum value. When the switch is changed under a condition of zero voltage or current, the control scheme is termed "zero-voltage" and/or "zero current" switching. In the case of switching at a minimum voltage, the control scheme is termed "low-voltage" switching. It is thus desirable to switch the power switching device(s) at instances of zero or minimum voltage in order to reduce stress on the switch(es) and the sources of power loss of the power supply or converter.
One method of implementing zero voltage switching is to provide a voltage signal across the power switch which passes through a zero value and then to control the switch to change states at the appropriate time relative to that signal. This is conventionally done by introducing a resonant network (for example, a series combination of an inductor and a capacitor) into the power supply circuit. The resonant network is connected to the power switch and acts to smooth the output signal of the power supply and provide a back emf across the power switch in the form of a sinusoidally varying waveform. The resonant elements are arranged so that the back emf waveform generates a zero crossing voltage signal across the power switch while the switch is off. This provides a zero-voltage or zero-current condition through the power switch, which is used to define the desirable switching point(s) for turning the switch on.
During each switching cycle in the operation of such resonantly switched Zero Voltage Switching (ZVS) power converters, the voltage across the power switch is driven to zero by the action of the inductive load which is part of the resonant network, and ideally, the switch is then turned on. This typically requires that ZVS Resonant converters have a large LC tank to ensure that there is sufficient inductive energy to drive the voltage across the switch to zero. However, a disadvantage of this means of providing a zero voltage signal across the power switch is that there is a significant power loss associated with the large intrinsic resistance of the resonant network capacitance and inductance, with the power loss being approximately proportional to the values of those elements.
Another important aspect of conventional forward converter circuits is that the magnetic core of the power transformer must be reset after each cycle. This prevents saturation of the transformer core and reduces the losses of the circuit. Power transformer reset is conventionally achieved by use of a tertiary winding which is coupled to the core. However, a disadvantage of this approach is that it complicates the design of the power transformer and typically results in an increase in the size and cost of the transformer.
Another feature of many conventional forward converters is the use of an active clamp as part of the circuit. An active clamp is typically formed from a series combination of a switching element and a clamp capacitor, with the series combination connected in parallel across the primary winding of the power transformer. The active clamp is used to reduce the stress imposed on the power switch and the power dissipated by the switch. An active clamp also can be used to recycle some of the magnetizing current built up in the transformer core, reducing losses for the circuit. However, a disadvantage of using an active clamp is that the current through the clamp switch can be high enough to make the I.sup.2 R losses in the equivalent series resistance of the clamp capacitor and switch a significant source of power loss.
In order to obtain ZVS conditions for the main switch and commutate the current in the secondary rectifiers to obtain efficiency at high operating frequencies and in particular high line conditions:
(1) the transformer magnetizing current in the clamp switch can be greater than 30% of the reflected peak secondary load current in magnitude. This increases conduction losses for the transformer, clamp capacitor, main and clamp switches and the turn off losses for the main and clamp switches; PA1 (2) substantial transformer leakage inductance is required which results in higher voltage ratings for the secondary rectifiers because of the leakage inductance related secondary transient voltages which are produced; PA1 (3) in lower voltage input circuits where adequate transformer leakage inductance cannot be provided, a secondary circuit AC choke is required (causing a loss of efficiency in particular for the low output voltage circuits); and PA1 (4) extra secondary driving controls and delays are needed to prevent high cross conduction losses when using synchronous rectification. This can often mean independent pulse transformers, extra windings on the main transformer and output choke to provide adequate gate drive voltages for the two synchronous rectifiers and separate secondary circuits to provide the delays.
In order to improve the stability of forward clamped circuits, small values of the clamp capacitor are utilized. This produces a large amount of ripple voltage that can increase the voltage ratings of both the main and the clamp switch (which have similar high voltage ratings).
What is desired is a forward converter circuit which is capable of zero voltage power switch operation, where the circuit elements responsible for the zero voltage switching result in lower power loss than those found in conventional devices. It is also desired to have a forward converter circuit in which the primary power transformer does not require a tertiary reset winding. It is further desired to have a forward converter circuit which does not utilize an active clamp to reduce the stress applied to the power switch.